`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    19:20:08 11/07/2008 
// Design Name: 
// Module Name:    PCMux 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module PCMux(
    input [15:0] PC,
    input [15:0] ALUOut,
    output reg [15:0] addr,
    input ALUOutSelect
    );
always@(*)
if(ALUOutSelect)
addr <= ALUOut;
else
addr <= PC;
endmodule
